The present invention relates to high speed parallel arithmetic circuitry and particularly to such circuitry for providing convenient accessibility to and from parallel arithmetic units.
Many complex computing problems involve highly replicated arithmetic operations. Scientific computing typically includes large continuum models that invariably generate a large, sparse matrix to be solved and this matrix-solving step is the bottleneck of the run for general-purpose computers. In order to solve complex problems in a reasonable time, the components of a monolithic supercomputer must be chosen for maximum speed, regardless of expense. However, computing circuitry relying upon replicated design can independently optimize performance and cost efficiency. Therefore, replicated, very large scale integrated circuits can provide the parallel solution of parts of many kinds of computationally intensive problems in a reasonable time.
An example of a fundamental operation that dominates scientific computing, the so called matrix-vector product (MVP), is the basis of both matrix multiplication and linear equation solving. If scientific matrix problems required only a single matrix-vector product at a time, then the only way to increase its speed would be to use faster arithmetic and memory circuits to implement a monolithic MVP unit. However, problems involving matrix-vector products require multiple MVPs to be evaluated. Thus, an alternative tactic for gaining speed is to devise parallel versions of the matrix-vector product.
The implementation of parallel arithmetic units for performing a computation such as the matrix-vector product is typically somewhat inflexible and special purpose oriented. Thus, individual units are not readily accessible from the standpoint of control and from the standpoint of data access to and from parallel units. Furthermore, the theoretically optimum speed may not be easily realized. An advantageous system would provide convenient and accessible communication with parallel computational units and at the same time take advantage of the speed possibilities of the units.